About Us


Active Layer Parametrics (ALP) is an innovative Silicon Valley company developing unique electrical characterization techniques and supplying metrology equipment for the semiconductor and adjacent industries.

Initial development of ALP’s Differential Hall Effect Metrology (DHEM) technique was carried out at UCLA’s Electrical Engineering Department. After protoyping the concept using a simple manual bench-top system, company led by co-founders Bulent Basol (CEO) and Abhijeet Joshi (CTO) initiated commercialization activity in 2016. As a result of this effort, which was supported by National Science Foundation (NSF) Small Business Innovation Research (SBIR) programs, the first automated tool (ALPro™ 50) with capability to depth profile electrical properties of semiconductor layers disposed over 50mm size coupons was developed. This was then followed by the development of ALPro™ 100 model that can perform measurements on 100mm size substrates. Two systems have been installed and are running at customer sites in the US and Taiwan as of end of 2019.

In addition to its co-founders ALP has a seasoned team with many years of experience in the semiconductor industry. ALP team includes Albert Boro (Boro Law Firm), Michael Gough (DeAnza College), Dan Armbrust (Co-founder and Director - Silicon Catalyst, past President - SEMATECH, Board Member- Ayar Labs, Irresistible Materials),  Izak Bencuya (Consultant), John Borland (President-J.O.B Technologies), Ali Keshavarzi (Stanford University), Sandeep Mehta (Semiconductor Technologist), Dave Millman (CEO-BizDev.Global), and David Su (National Tsing Hua University, past Director- TSMC). 

ALP is partnering with Areias Systems of Silicon Valley for manufacturing of ALPro™ tools. Areias is an ISO 9001-certified contract manufacturer with over 20 years of experience in building semiconductor equipment.

Customers can access these capabilities to address their unique materials and device characterization needs by contacting info@alpinc.net. Our experience is that ALP’s technology provides a critical complement to techniques such as SIMS, C-V scans, spreading resistance, etc., especially for ultra shallow junctions.